Design of High-Speed 16-Bit Flash ADC for OFDM Receiver Channel Estimation

Abstract

This research presents a highly efficient 16-bit two-step flash ADC for optimum receiver channel estimation in OFDM systems. The ADC employs an innovative architecture based on multiplexers, including low-power latched comparators, multiplexers, and a multiplexer-based encoder, which results in fewer comparators and higher performance while keeping a compact design and low power consumption. It delivers an outstanding signal-to-noise ratio, effective resolution, and figure of merit at a given sampling rate. The research provides an innovative approach for improving accuracy and resource economy in OFDM systems: integrating compressive sensing with a 16-bit flash ADC. This hybrid approach improves high-resolution OFDM channel estimation, allowing for exact estimate with fewer samples and less memory. The 16-bit flash ADC delivers great performance, with low power consumption, a smaller in size, and fast operation. Moreover, integrating compressive sensing significantly improves accuracy and resource efficiency in OFDM channel estimation, allowing for precise estimation with reduced comparators about 130 and computational needs. These advancements hold great promise for enhancing OFDM system performance, especially in resource-constrained scenarios.