Neural Network-Based Iterative Process with Soft Decoding Algorithms for Regular and Irregular LDPCC - A Low-Density-Parity-Check Codes Decoder Schema

Abstract

The development of LoRa networks is employed in various ap- plications with the adoption of simple FEC codes, which include Hamming codes that enable restricted FEC capacity, resulting in unpredictable data transmissions and elevated energy consumption of LoRa nodes. To over- come these gaps, the existing researchers developed LoRa Low-Density Parity-Check(LLDPC), which enables Low-Density Parity-Check coding, especially in LoRa networks. The decoding stage process is to return the original data from the stored or received erroneous encoded data. In the context of classical error correction, LDPC codes were considered one of the significant processes on error-correction code candidates, along with LDPC code-design research, analysis, and iterative decoders for three decades. The current research uses a Neural Network-based iterative process with Soft Decoding Algorithms for Regular and Irregular LDPCC. An LDPC codes decoder Schema has been utilized. Eventually, the neural network training for decoding LDPC codes was considered in the research with the utilized method. The epoch used with the total 209 iterations, time of 00.02, performance procured 0.146, gradient 0.00102, and with the valida- tion checks six has been evaluated.