Efficient QCA based Ripple Carry Adder Design using an Energy Efficient and Scalable Full Adder

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Gurram Umadevi, Kanaka Durga Ganapavarapu, Chandra Sekhar Paidimarry

Abstract

Quantum Dot Cellular Automata (QCA) is an emerging technology offering a promising alternative to traditional CMOS for designing ultra-low-power and high-density digital circuits. Among the critical components of digital computation is the full adder, which performs essential arithmetic operations. This study conducted deep analysis of various full adder and Ripple Carry Adder designs based on the QCA technology in the recent literature emphasizing their architectural innovations, performance metrics, and comparative advantages. Furthermore, recent QCA Full Adder designs leveraging electrostatic interaction between the cells, are simulated on QCA Designer-E platform, to verify the functionality and to estimate the energy dissipation. The study identifies the most optimal full adder design through comprehensive simulation and performance assessment made against multiple design metrics such as energy dissipation, latency, area, complexity including scalability. 4 bit and 8-bit Ripple Carry Adders are constructed using best identified Full adder design. It is a no-crossover design using 92 cells occupying 0.1µm2 area and 1.25 clock cycles latency.

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