Single Stage ZVS PFC Circuits with Voltage Doubler

Abstract

To improve the efficiency of the circuit and to minimize the THD to the negligible level voltage doubler circuit is interleaved with the single stage ZVS PFC converter circuits. The voltage doubler circuit is used to obtain UPF with low THD and increased performance efficiency of the converter by imposing the control over the current. The voltage doubler is charged by the converter operation at both negative and positive cycle. The converter circuit without voltage doubler was used in low power rating applications. But with the voltage doubler circuits high power ratings applications are possible. In this circuit the reduced switching loss of 6.7% is obtained with the THD 2.95[12]. The improvised performance efficiency with the input condition of 529.65W/ 31.21 A is 93.28%.